Mohammadreza Soltaniyeh

Ph.D. Student 

Department of Computer Science

Rutgers, The State University of New Jersey


Short Bio: I am fourth year Ph.D. Student under supervision of Prof. Santosh Nagarakatte in the Computer Science Departement at Rutgers university. My research interests are Computer Architecture, FPGA Acceleration, High Level Synthesis, Hardware Design for Machine Learning. Here is my latest CV.  

Contact information

email: m.soltaniyeh@cs.rutgers.edu

office: CoRE Building 333, 110 Frelinghuysen Rd, Piscataway, NJ, 08854.

Google Scholar/ LinkedIn






Ongoing research


A end-to-end FPGA acceleration of sparse matrix multiplication.




Educational background


Ph.D. Computer Science, Rutgers University, USA. 2015-Present

M.Sc. Computer Science, Bilkent University, Turkey. 2013-2015

B.Sc. Computer Hardware Engineering, University of Tehran, Iran. 2007-2012




Publications


Classifying Data Blocks at Subpage Granularity with an On-Chip Page Table to Improve Coherence in Tiled CMPs Mohammadreza Soltaniyeh, Ismayil Kadayif, Ozcan Ozturk.
IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems, 2017.


Boosting performance of directory-based cache coherence protocols with coherence bypass at subpage granularity and a novel on-chip page table. Mohammadreza Soltaniyeh, Ismayil Kadayif, Ozcan Ozturk.
Proceedings of the ACM International Conference on Computing Frontiers, 2016. (CF’16)


Quota setting router architecture for quality of service in GALS NoC.

Kazem Cheshmi, Jelena Trajkovic, Mohammadreza Soltaniyeh, Siamak Mohammadi

International Symposium on Rapid System Prototyping , 2013. (RSP’13)


Posters:


A Scalable Cache Coherence Scheme for Large-Scale Chip Multiprocessor.

MR.Soltaniyeh , O.Ozturk. Appeared in ASPLOS SRC ACM Student Competition, March 2015